Iei-integration IMB-Q354 v1.10 Manual de usuario descargar pdf (Pagina 188)

IMB-Q354 microATX Motherboard

Page 188

L2 Cache The Level 2 Cache (L2 Cache) is an external processor memory cache.

LCD Liquid crystal display (LCD) is a flat, low-power display device that

consists of two polarizing plates with a liquid crystal panel in between.

MAC The Media Access Control (MAC) protocol enables several terminals or

network nodes to communicate in a LAN, or other multipoint networks.

PCIe PCI Express (PCIe) is a communications bus that uses dual data lines for

full-duplex (two-way) serial (point-to-point) communications between the

SBC components and/or expansion cards and the SBC chipsets. Each

line has a 2.5 Gbps data transmission rate and a 250 MBps sustained

data transfer rate.

POST The Power-on Self Test (POST) is the pre-boot actions the system

performs when the system is turned-on.

RAID Redundant Array of Inexpensive Disks (RAID) refers to redundantly

backing up data on multiple disks to ensure that if one disk fails, the data

is not lost and can be restored from the remaining disks in the array.

RAM Random Access Memory (RAM) is volatile memory that loses data when

power is lost. RAM has very fast data transfer rates compared to other

storage like hard drives.

SATA Serial ATA (SATA) is a serial communications bus designed for data

transfers between storage devices and the computer chipsets. The SATA

bus has transfer speeds up to 1.5 Gbps and the SATA 3Gb/s bus has

data transfer speeds of up to 3.0 Gbps.

S.M.A.R.T Self Monitoring Analysis and Reporting Technology (S.M.A.R.T) refers to

automatic status checking technology implemented on hard disk drives.

UART Universal Asynchronous Receiver-transmitter (UART) is responsible for

asynchronous communications on the system and manages the system’s

serial communication (COM) ports.

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Iei-integration IMB-Q354 v1.10 Manual de usuario Pagina 188