Iei-integration IMB-Q354 v1.10 Manual de usuario descargar pdf (Pagina 21)

IMB-Q354 microATX Motherboard

Page 21

1.5 Data Flow

Figure 1-4 shows the data flow between the two on-board chipsets and other components

installed on the motherboard and described in the following sections of this chapter.

Figure 1-4: Data Flow Block Diagram

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 215 216

IMB-Q354 1
Revision 2
Copyright 3
Table of Contents 4
List of Figures 9
List of Tables 13
BIOS Menus 15
1 Introduction 16
1.1 Overview 17
1.2 Features 18
1.3 Connectors 19
1.4 Dimensions 20
1.5 Data Flow 21
1.6 Technical Specifications 22
2 Unpacking 24
2.1 Anti-static Precautions 25
2.2 Unpacking Precautions 25
2.3 Package Contents 26
2.4 Optional Items 27
3 Connector Pinouts 28
Page 30 30
PIN NO. DESCRIPTION 34
1 Ground 2 VCC 35
3 Output 3 4 Output 2 35
5 Output 1 6 Output 0 35
7 Input 3 8 Input 2 35
9 Input 1 10 Input 0 35
2 +12VCC 36
3 Rotation Signal 36
4 Control 36
1 VCC 2 GND 46
3 CS# 4 CLOCK 46
5 SO 6 SI 46
7 NC 8 NC 46
3 DATA- 4 DATA+ 48
5 DATA+ 6 DATA 48
7 GND 8 VCC 48
2 DATA 52
4 DATA+ 52
4 GROUND 52
4 Installation 55
4.1 Anti-static Precautions 56
Page 58 58
4.2.2 Installation Checklist 58
4.3 Unpacking 59
Page 62 62
Page 64 64
WARNING: 64
4.5.1 Clear CMOS Jumper 69
Clear CMOS Description 70
Page 72 72
4.6 Chassis Installation 73
Figure 4-23: VGA Connector 85
5 AMI BIOS 86
5.1 Introduction 87
5.3 Advanced 90
5.3.1 CPU Configuration 91
Configuration 92
Page 94 94
Page 96 96
5.3.3 Floppy Configuration 97
Page 98 98
5.3.4 Super IO Configuration 98
DEFAULT 100
Page 101 101
IMB-Q354 microATX Motherboard 102
Page 102 102
Page 103 103
Page 104 104
Page 108 108
5.3.7.1 AHCI Port n 108
Page 110 110
Page 114 114
5.3.11 Trusted Computing 114
Page 115 115
5.3.12 USB Configuration 115
Page 116 116
Page 117 117
5.3.13 IEI Feature 117
5.4 PCI/PnP 118
Page 120 120
5.5 Boot 121
Page 122 122
5.6 Security 123
5.7 Chipset 124
Page 126 126
5.8 Exit 129
Page 130 130
6 Software Drivers 131
6.2 Driver CD Auto-run 132
Page 133 133
6.3 Intel® Chipset Driver 134
EXT to continue 136
Page 137 137
Page 138 138
Page 141 141
Page 142 142
Page 143 143
Figure 6-19 144
Step 4: The window in 144
Figure 6-20 appears 144
Page 145 145
Page 149 149
Figure 6-29 150
Figure 6-30 appears 150
Page 151 151
Step 0: 157
Page 159 159
Page 160 160
6.8 Intel 161
Step 5: 162
Page 163 163
Page 164 164
Page 165 165
Page 166 166
Configuration 171
7.1 Intel 172
AMT Setup Procedure 172
7.2 Intel 173
Figure 7-6: Provision Model 175
Y and press Enter 175
7.3 Using the Intel 177
AMT Web Interface 177
Page 180 180
NOTE: 180
A BIOS Options 181
B Terminology 185
Page 186 186
Page 187 187
Page 188 188
Page 189 189
C DIO Interface 190
C.2 DIO Connector Pinouts 191
D Watchdog Timer 193
E Compatibility 196
E.2 Compatible Processors 197
Page 198 198
Matrix Storage 199
Manager 199
F.1 Introduction 200
F.2 Features and Benefits 201
F.3 Accessing the Intel 201
Matrix Storage Manager 201
F.4 RAID Configuration 202
NTER to 203
Formatted: Bulle 206
NTER. See Figure F-8 207
NTER. See Figure F-12 209
Page 210 210
Figure F-16: Exit Menu 212
Figure F-17. Step 0: 212
Disclosure 213
G Hazardous Materials 213
Mercury 214

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