Iei-integration NANO-945GSE v2.00 Manual de usuario Pagina 11
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NANO-945GSE EPIC Motherboard
Page 11
E ADDRES
S MAPPING ......................................................................................... 191
E.1
I/O ADDRESS MAP ................................................................................................. 192
E.2 IRQ ADDRESS MAP.............................................................................................. 194
E.3 MEMORY ADDRESS MAP...................................................................................... 195
F HAZARDOUS MATERIALS DISCLOSURE................................................... 196
F.1 HAZARDOUS MATERIAL DISCLOSURE TABLE FOR IPB PRODUCTS CERTIFIED AS ROHS
COMPLIANT UNDER 2002/95/EC WITHOUT MERCURY................................................ 197
- NANO-945GSE 1
- Revision 2
- Copyright 3
- Manual Conventions 4
- Table of Contents 7
- List of Figures 12
- List of Tables 15
- List of BIOS Menus 17
- 1 Introduction 18
- 1.1 Overview 19
- 1.2 Connectors 19
- Page 20 20
- 1.3 Board Dimensions 22
- 6Figure 1-5 24
- 1.5 Technical Specifications 26
- Page 28 28
- 2 Unpacking 29
- 2.1 Anti-static Precautions 30
- 2.2 Unpacking Precautions 30
- 2.3 Unpacking Checklist 31
- Page 32 32
- 2.3.2 Optional Items 32
- 3 Connectors 34
- 3.1.1 NANO-945GSE Layout 35
- Page 36 36
- Page 38 38
- 3.3.1 5V Power Connector 38
- PIN NO. DESCRIPTION 40
- 2 PS-ON 41
- 3 +5V Standby 41
- 1 SYNC 2 BITCLK 42
- 3 SDOUT 4 PCBEEP 42
- 5 SDIN 6 RST# 42
- 7 VCC 8 GND 42
- 9 +12V 42
- 1 LCD Backlight Control 43
- 2 GROUND 43
- 4 GROUND 43
- 5 BACKLIGHT Enable 43
- Page 46 46
- 6Figure 3-12 48
- 6Table 3-12 48
- 3 IR-RX 50
- 5 IR-TX 50
- 7Figure 3-15 51
- 7Table 3-15 and Figure 4-16 51
- CN Label: 54
- Page 56 56
- 3.3.16 PCI-104 Slot 56
- Page 58 58
- 7Figure 3-19 59
- 7Table 3-20 59
- 9 Ground (GND) 10 N/C 60
- 7Figure 3-22 62
- 7Table 3-23 62
- 7Figure 3-23 62
- 7Table 3-24 62
- PIN DESCRIPTION PIN 65
- DESCRIPTION 65
- 7Figure 3-24 (see 2) 66
- 7Table 3-28 and 7Figure 3-27 66
- Figure 3-28: VGA Connector 68
- 4 Installation 69
- 4.1 Anti-static Precautions 70
- Read the user manual: 71
- Page 72 72
- 4.2.2 Installation Checklist 72
- 4.3 Unpacking 73
- NOTE: 75
- Open Use ATX power 77
- CF Card Setup Description 78
- Open Slave Default 78
- Closed Master 78
- 7Table 4-4 79
- 7Figure 4-6 below 79
- Page 80 80
- Short 1-2 +3.3V LVDS 82
- Short 1-2 +5V 83
- Short 2-3 +3.3V 83
- 4.6 Chassis Installation 84
- Dual port USB cable 85
- Parallel port cable 85
- RS-232/422/485 cable 85
- ATX power cable 85
- Page 94 94
- 7Figure 4-23 100
- Step 0: 102
- 7Figure 4-27 103
- 5 BIOS Screens 105
- 5.1 Introduction 106
- NANO-945GSE EPIC Motherboard 108
- Page 108 108
- 5.3 Advanced 109
- Page 110 110
- 5.3.1 CPU Configuration 110
- Page 111 111
- 5.3.2 IDE Configuration 111
- Page 112 112
- Page 113 113
- Page 114 114
- DEFAULT 119
- Page 120 120
- Page 124 124
- CPU Fan Start PWM 125
- Slope PWM 1 125
- CPU Fan PWM control 125
- Minimum Value: 0°C 125
- Maximum Value: 127°C 125
- Page 126 126
- Page 127 127
- 5.3.5 Power Configuration 127
- Page 128 128
- 5.3.5.1 ACPI configuration 128
- Page 130 130
- Page 132 132
- 5.3.6 Remote Configuration 132
- Page 133 133
- Page 134 134
- Page 135 135
- Page 136 136
- 5.3.7 USB Configuration 136
- 5.4 PCI/PnP 138
- 5.5 Boot 141
- 5.6 Security 145
- 5.7 Chipset 146
- 64MB 148
- 128MB DEFAULT 148
- Maximum DVMT 148
- 5.8 Exit 151
- Page 152 152
- 6 Software Drivers 153
- Page 154 154
- Page 155 155
- Page 156 156
- Page 157 157
- Page 158 158
- Page 159 159
- Page 160 160
- 6.4 VGA Driver Installation 161
- Page 162 162
- Page 163 163
- Page 164 164
- Page 165 165
- 6.5 LAN Driver Installation 166
- Page 167 167
- Page 168 168
- Page 169 169
- 6.6.1 HD Audio Installation 169
- Page 170 170
- Page 171 171
- Page 172 172
- Page 173 173
- Page 174 174
- Page 175 175
- A BIOS Menu Options 176
- B Terminology 180
- Page 181 181
- Page 182 182
- Page 183 183
- Page 184 184
- C DIO Interface 185
- C.2 DIO Connector Pinouts 186
- D Watchdog Timer 188
- E Address Mapping 191
- E.1 I/O Address Map 192
- Page 193 193
- E.2 IRQ Address Map 194
- E.3 Memory Address Map 195
- F Hazardous Materials 196
- Disclosure 196
- Page 197 197
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