Iei-integration WAFER-945GSE v1.03 Manual de usuario Pagina 5
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WAFER-945GSE 3.5” Motherboard
Page v
NOTE:
These messages inform the reader of essential but non-critical information. These
messages should be read carefully as any directions or instructions contained therein can
help avoid making mistakes. Notes are easy to recognize. The word “note” is written as
“NOTE,” both capitalized and bold and is followed by text. The text is the cautionary
message. A note message is shown below:
NOTE:
This is an example of a note message. Notes should always be read.
Notes contain critical information about the WAFER-945GSE. Please
take note messages seriously.
- WAFER-945GSE 1
- Revision 2
- Copyright 3
- Manual Conventions 4
- Packing List 6
- Table of Contents 7
- 563H181 12
- List of Figures 13
- List of Tables 16
- List of BIOS Menus 18
- Page xix 19
- 1 Introduction 21
- 1.1 Overview 22
- 1.2 WAFER-945GSE Overview 22
- 2 Detailed Specifications 27
- 2.1 Dimensions 28
- 2.2 Data Flow 29
- 712HFigure 2-4 below 31
- 714HFigure 2-6 below 33
- Page 16 36
- 2.4.3.2 LVDS Interface 36
- 2.5 Intel 37
- ICH7-M Southbridge Chipset 37
- 715HFigure 2-10 38
- BIOS chipset 40
- Super I/O chipset 40
- Page 22 42
- 718HFigure 43
- 2.6 LPC Bus Components 45
- Page 26 46
- Page 30 50
- 2.7.3 Power Consumption 50
- 3 Unpacking 51
- 3.1 Anti-static Precautions 52
- 3.2 Unpacking 52
- 3.3 Unpacking Checklist 53
- Page 34 54
- 3.3.2 Optional Items 54
- 4 Connectors 55
- Page 36 56
- 731HFigure 4-2 58
- 732HTable 4-3 58
- 735HFigure 4-4 60
- 736HTable 4-5 60
- Page 42 62
- 4.3.5 CompactFlash® Socket 62
- 741HFigure 4-7 63
- 742HTable 4-8 63
- 3 Fan Speed Detect 65
- 747HFigure 4-10 66
- 748HTable 4-11 66
- 4.3.11 PCIe Mini Card Slot 69
- Page 50 70
- 1 Power Switch 71
- Page 52 72
- 4.3.14 SATA Drive Connectors 72
- 759HFigure 4-16 73
- 760HTable 4-17 73
- 761HFigure 4-17 75
- 762HTable 4-18 75
- Page 58 78
- 4.4.1 LAN Connectors 78
- 810H768HTable 4-21 79
- 811H769HFigure 4-19 (see 2) 79
- 1 DCD 6 DSR 80
- 2 RX 7 RTS 80
- 3 TX 8 CTS 80
- 4 DTR 9 RI 80
- 5 GND 80
- 816H774HFigure 4-19 81
- 5 Installation 83
- 5.1 Anti-static Precautions 84
- Read the user manual: 85
- Page 66 86
- 5.2.2 Installation Checklist 86
- 5.3 Unpacking 87
- 778HFigure 5-1) 88
- 779HFigure 5-1) 88
- 780HFigure 5-2. Step 0: 88
- 782HTable 5-2 90
- 783HFigure 5-4 90
- 784HTable 5-2 90
- Load Optimal Defaults 92
- 833H793HFigure 5-6 below 93
- 794HTable 5-5 93
- 795HFigure 5-7 93
- 796HTable 5-5 93
- 801HFigure 5-8 95
- 5.6 Chassis Installation 97
- Dual port USB cable 98
- RS-232/422/485 cable 98
- ATX power cable 98
- SATA power cable 98
- 4-COM port kit 99
- 810HFigure 5-16 101
- 811HFigure 5-16 101
- 812HFigure 5-14 103
- 813HFigure 103
- 814HFigure 5-15 103
- 816HFigure 5-16 105
- 818HFigure 5-18 107
- Step 0: 109
- 862H821HFigure 110
- 5.9 Heat Sink Enclosure 112
- 6 BIOS Screens 114
- 6.1 Introduction 115
- 6.3 Advanced 118
- 6.3.1 CPU Configuration 119
- Page 101 121
- WAFER-945GSE 3.5” Motherboard 122
- Page 102 122
- Page 103 123
- Page 112 132
- CPU Fan Start PWM 133
- Slope PWM 1 133
- CPU Fan PWM control 133
- Minimum Value: 0°C 133
- Maximum Value: 127°C 133
- Page 114 134
- Page 115 135
- 6.3.5 Power Configuration 135
- Page 116 136
- 6.3.5.1 ACPI configuration 136
- Page 118 138
- Page 120 140
- 6.3.6 Remote Configuration 140
- Page 121 141
- Page 122 142
- Page 123 143
- Page 124 144
- 6.3.7 USB Configuration 144
- 6.4 PCI/PnP 146
- IRQ3 147
- IRQ4 147
- IRQ5 147
- IRQ7 147
- 6.5 Boot 149
- 6.6 Security 153
- 6.7 Chipset 154
- 64MB 156
- 128MB DEFAULT 156
- Page 137 157
- 6.8 Exit 158
- Page 139 159
- Page 140 160
- 7 Software Drivers 161
- Page 142 162
- Page 143 163
- Page 144 164
- Page 145 165
- Page 146 166
- Page 147 167
- Page 148 168
- 7.4 VGA Driver Installation 169
- Page 150 170
- Page 151 171
- Page 152 172
- Page 153 173
- 7.5 LAN Driver Installation 174
- Page 155 175
- Page 156 176
- WARNING: 176
- Page 157 177
- Page 158 178
- Page 159 179
- A BIOS Menu Options 180
- B Terminology 184
- Page 165 185
- Page 166 186
- Page 167 187
- Page 168 188
- C DIO Interface 189
- C.2 DIO Connector Pinouts 190
- D Watchdog Timer 192
- E Address Mapping 195
- E.1 I/O Address Map 196
- Page 177 197
- E.2 IRQ Address Map 198
- E.3 Memory Address Map 199
- F Hazardous Materials 200
- Disclosure 200
- Page 181 201
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